HF data transmission demystified

HF data transmission demystified

Today, many types of free-band (433 MHz) wireless data transmitters/receivers are widely available on the home electronics market. Most of these modules have no built in logic and use simple tranmission techniques (ASK/FSK). Although the datasheets may make you think differently, creating a robust data link with these modules is not straighforward. You have to take some hardware and software design considerations into account to make a more robust link.

Advanced rf data encoding schemes do exist (eg manchester encoding), but are more difficult to implement on a microcontroller due to jitter or need external hardware (which is not desireable in low-cost or highly integrated applications). However, it is possible to build a simple to implement but very robust data encoding scheme that uses the standard UART, which is available in almost all microcontrollers.

In this article I will try to explain some of the specific problems and how to solve these problems.


Introduction into HF data transmission

A typical data transmitter module modulates the incomming data into a RF signal. Most low-cost RF data modules use either ASK (amplitude shift keying) or FSK (frequency shiftkeying). While ASK is somewhat more prone to data corruption, the data transmission problems are almost the same for both ASK and FSK.


Overview

A typical RF data transceiver is contstructed as follows:



The dataslicer

In almost all low-cost RF data modules, the following data slicer is used:


In practice, this is is a simple but very robust decoder. It has however some design considerations, since it assumes that incomming data has a overall duty-cycle of 50%.

The Settling time of the Data Slicer requires, that for a certain time before the data itself, a preamble, composed by a square wave with a duty-cylce of 50%, must be transmitted to make sure the DC-level of the data slicer is set correctly. Only then, reliable data reception is possible.

The Data Slicer is optimized for a 50:50 duty cycle. It will continue to operate till a duty-cycle of 30:70 or 70:30, but the distortion increases and the receiver becomes less tolerant to interferences. Therefore, it is not possible to directly transmit a RS232 sequence through a RF data link without balancing the number of ones and zeros in the stream.

It is possible to transmit a byte and then directly tranmit the same byte but inverted again, but this decreases the maximum data rate 50% which is obviously not desirable.


Synchronisation issues

There are 3 levels of synchronisation that need to be implemented in RF data links:
  • bit alignment (where to sample an incoming bit)
  • byte alignment (did we recieve bit 0 or bit 1?)
  • packet alignment (what is the first byte of the packet?)



Data encoding and synchronization

The following data encoding scheme can be used:

DescriptionData
receiver warmup (3x)1 0 1 0 1 0 1 0
byte alignment (hi)1 1 1 1 1 1 1 1
byte alignment (lo)0 0 0 0 0 0 0 0
packet byte 0data[0] xor 10101010
..
..
packet byte n-1data[n-1] xor 10101010
checksumchecksum = FFh - sum of xor-ed bytes

Keep the packets as short as possible.


Hardware considerations

The main goal is to minimize transmitter / receiver noise. Any noise added to the analog signal will increase the number of bit errors (and therefore lost packets). The receiver is much more prone to electronic noise than the transmitter.

Receiver design considerations:
  • Supply of receiver should be filtered by a appropriate LC or RC filter to reduce reciever noise.
  • Keep receiver away from other noise generating components (such as microcontrollers, motors, servos)
  • Install a ground shield or use at least a groundplane under the receiver.
  • Keep the antenna (and HF-leads) away from noise generating components.
  • If the antenna is far away from the receiver module, use good coaxial cable.

Transmitter design considerations:
  • Nothing yet!